Talk:IBM System/38

The following paragraph from the article is nearly meaningless without either further explanation, or creation of the pages for the wikified-but-nonexistent terms:

System/38 and its descendants are unique in being the only existing commercial capability architecture computers. The earlier Plessey 250 was one of the few other computers with capability architecture ever sold commercially. Additionally, the System/38 and its descendants are the only commercial computers ever to use a machine interface architecture to isolate the application software and most of the operating system from hardware dependencies, including such details as address size and register size.

Can anyone provide some information on what a capability architecture is, and how the System/38 used one? It's a little odd to claim that it's unique because of this, but then not provide any information on what it is, or how the architecture is implemented. --Kadin2048 17:43, 2 August 2006 (UTC)

Just as a followup, it seems that an article has been created at capability architecture, or it's been redirected to a page that seems to explain it, so I think that's one problem solved. (It could still use improvement, though, by someone who was really familiar with how the S/38 implemented the architecture, but at least now the concept is explained.) The link to machine interface still leads to an empty page, though. --Kadin2048 07:28, 21 April 2007 (UTC)

Seems like I may be the only one here. Anyway, I've removed another confusing paragraph from the text, at least until someone can elucidate what it means, exactly:

The machine itself was relative; in theory, it was possible to start processing an instruction in London, continue it a fraction of second later in on a machine in Los Angeles and finish it on one in Tokyo; without the user noticing any difference whatsoever as the machine kept track of this. In practice this was never implemented, but it was indicative of the incredible power of the machine. Thus the very powerful operating system had everything that every system designer might have wanted. ^[1]

This is almost a direct copy-and-paste from the 'futureobservatory.dyndns.org' link, which seems to be from some book or memoir about IBM. Anyway, there isn't any real help from the link about what "relative" means in this context. How does it mean you can stop processing in Los Angeles and resume processing in Tokyo? Without more information on how this is accomplished, or what this means in terms of the machine's architecture, it's pretty meaningless. Do you have to have identical machines in Tokyo and L.A.? Does it imply that storage and processing are detached? I don't know, but neither would a casual reader, so it's not much good. If anyone wants to explain, feel free to bring it back in. --Kadin2048 06:44, 21 April 2007 (UTC)

That paragraph reads as if it were written by a marketing person who was explaining what he/she understood the engineers to be saying, which means the relationship it bears to what the engineers were actually trying to say is unclear. From looking at that site, I suspect the person who wrote it was a marketing person and might well have misinterpreted some engineer's perhaps half-baked idea as something that actually made it into the system architecture. Guy Harris 07:11, 21 April 2007 (UTC)

It appears that the article on capability-based architectures was merged with a largely unrelated one on capability-based security, resulting in the confusion we see. I don't know what happened to the machine interface article. drh 00:01, 6 May 2007 (UTC)

Wikipedia In computer science, capability-based addressing is a scheme used by some computers to control access to memory. Under a capability-based addressing scheme, pointers are replaced by protected objects (called capabilities) that can be created only through the use of privileged instructions which may be executed only by either the kernel or some other privileged process authorized to do so. This effectively allows the kernel to control which processes may access which objects in memory without the need to use separate address spaces and therefore requiring a context switch when an access occurs. This allows an efficient implementation of capability-based security. Hjwoudenberg (talk) 23:22, 5 December 2017 (UTC) Herman J Woudenberg

What happened to the machine interface article is that nobody ever wrote it. :-) It would be an interesting article, although "Technology Independent Machine Interface" would probably be a better title, as there are a lot of types of interfaces to machines, so just "machine interface" would probably be too generic a name, although capitalized "Machine Interface" might also work. Guy Harris 00:56, 6 May 2007 (UTC)

The article claims that the S/38 was the first computer with single-level addressing for memory and all I/O devices. Wasn't this done in Multics about 15 years earlier? -- Richardthiebaud (talk) 01:36, 22 February 2008 (UTC)

The System/38 has Single Level Storage (memory), virtual memory and actual memory (real memory) besides disk storage. Some people refer to virtual memory as Single Level Storage.

Wikipedia Single Level Storage:

It originally meant what is now usually called virtual memory, introduced in 1962 by the Atlas system at Manchester.

Wikipedia Multics

Multics (Multiplexed Information and Computing Service) is an influential[4][5] early time-sharing operating system, based on the concept of a single-level memory.

I found no documentation claiming these two systems had a address space greater then virtual memory.

The iSeries and AS/400 models can address 18,446,744,073,709,551,616 bytes, or 18.4 quintillion bytes. Light travels at approximately 6,000,000,000,000 miles in one year. The IBM i has twice the number of millimeters in a light year. There are 25.4 millimeters in an inch. Hjwoudenberg (talk) 23:15, 5 December 2017 (UTC) Herman J Woudenberg 12/5/2017

The single-level store page says:

It now usually refers to the organization of a computing system in which there are no files, only persistent objects (sometimes called segments), which are mapped into processes' address spaces (which consist entirely of a collection of mapped objects). The entire storage of the computer is thought of as a single two-dimensional plane of addresses (segment, and address within segment).

The persistent object concept was first introduced by Multics in the mid-1960s, in a project shared by MIT, General Electric and Bell Labs.^[1] It also was implemented as virtual memory, with the actual physical implementation including a number of levels of storage types. (Multics, for instance, had three levels: originally, main memory, a high-speed drum, and disks.)

without saying what "persistent" means.

In Multics, all access to files on random-access secondary storage (disks and the like) was done by mapping the file into the segmented address space of the process and referring to it. Files did not have persistent virtual addresses, and not all files on the system were in a process's address space; you had to "initiate" a file to turn it into a segment in your address space.

So I'm not sure whether that would count as a "single-level store". Given that the GE 645 had an 18-bit segment number, that's a maximum of 262,144 segments in a process's address space, so if you had more than 256K files, "the entire storage of the computer" could not be "thought of as a single two-dimensional plane of addresses". That's why Multics required that you map files in, rather than having them all in your address space from the beginning. Guy Harris (talk) 00:00, 6 December 2017 (UTC)

You have always been able to have a physically contiguous file. When creating the file you just used the ALLOCATE(*YES) parameter on the CRTPF (Create Physical File) command. This has been this way since release 1 of CPF and still works today on the System i. This feature is usually not used, but is there. 24.73.202.134 (talk) 05:00, 19 December 2010 (UTC)

They System/36 article shows that computer as being from 1983 to 2000, while the System/38 says it was released in 1979. Unless years count backwards, something is off, since the System/36 was released after the System/38, meaning it couldn't have really come before it. — Preceding unsigned comment added by 69.230.97.126 (talk) 16:22, 12 February 2013 (UTC)

The article says "By contrast, competing proprietary computing architectures from the early 1980s such as Digital's VAX,[citation needed] Wang VS and Hewlett Packard's HP3000 have long been discontinued without a compatible upgrade path."

VAX Code written on the earliest vaxes still runs today with cross compiling and/or emulation on HP Itanium-based servers which are available for purchase currently (2015). OpenVMS, the VAXes operating system, is still being actively developed and supported and has dedicated enterpise user base.

The comment is incorrect and should be removed.

As well some attention might be paid to the congratulatory tone of this article which is not up to wikipedia standards. — Preceding unsigned comment added by 168.159.213.207 (talk) 13:52, 20 July 2015 (UTC)

I've removed the VAX from the list. I put the [citation needed] there about 1 1/2 years ago, with the comment "Err, umm, VAX -> Alpha ->Itanium for OpenVMS - perhaps not as smoothly as IMPI -> PPC for AS/400, but....)", and nobody ever bothered to provide a reference to refute the implied question; now that it's an explicit question, we might as well answer it "No, the VAX did have a compatible upgrade path".

There's a hatnote at the top of the article complaining about the tone. Guy Harris (talk) 17:18, 20 July 2015 (UTC)

Somewhere in the article there should be a reference of the role the CREATE PROGRAM MI instruction fills as the only means to compile a PROGRAM OBJECT from an MI template. Essentially the same information also belongs in AS/400 -- Shmuel (Seymour J.) Metz Username:Chatul (talk) 14:16, 24 January 2024 (UTC)

I thought I remembered it as 64 bits virtual, in some sense of virtual. Well, the way I remembered it, is that addressing is not reused Maybe 48 bits is enough. So, each time a program is run, it uses another part of the large (enough) address space. But I am remembering from the 1970's, and even then, not using the machine. Gah4 (talk) 22:43, 29 January 2025 (UTC)

1980s ("announced in 1978 and delivered in 1980"), and I remembered it as 48, but I found this "The System38 hardware only supports 48-bit physical addresses composed of these fields. However, when an object is created, the microcode extends the address to 64 bits by adding an additional 16-bit field." -- Shmuel (Seymour J.) Metz Username:Chatul (talk) 14:19, 30 January 2025 (UTC)

Yup, that's from chapter 8 "IBM System/38" of Henry Levy's Capability-Based Computer Systems.

IBM's PLM for the low-level system software for System/38, a/k/a "vertical microcode" (which it really isn't, it's internal system code), says:

When a segment group is created, storage management assigns an 8-byte address to the new segment group. This address consists of the following:

• Segment group extender (2 bytes)
• Segment group identifier (3 bytes)
• Offset into the segment group (3 bytes)

The segment group extender is a 2-byte extension to the 6-byte VMC address. The extender together with the 3-byte segment group number forms a 5-byte identifier that is assigned only once during the life of the machine. The 3-byte segment group identifiers are assigned sequentially until hex 3FF000, at which time the segment group extender is incremented and the address regeneration routine must be executed. At any one time, each 3-byte segment group identifier in the system is unique, although once the corresponding segment group is destroyed, the identifier is available for reassignment.

The segment group extender is used only by VMC routines. When an object is accessed by a pointer instruction, the extender in the object header is compared with the extender in the 16-byte system pointer. If they do not match, the pointer is invalid (the pointer in this case is an old pointer to a destroyed segment with a reassigned segment identifier). The extender is not used for internal VMC addresses because these addresses are checked for validity and written with a special identifier if they are no longer in use.

"Pointer instruction" probably refers to MI instructions that use MI pointers. I don't know whether "used only by VMC routines" means that the IMPI code that the vertical microcode's binary-to-binary translator generates for MI pointer instructions include IMPI instructions to check the extenders or if it calls a vertical microcode routine to do that comparison.

But, in any case, the 8-byte address isn't an address in a fully-usable address space of 2⁶⁴ bytes - that address space isn't accessible by IMPI memory-reference instructions (IMPI addresses are 48 bits), it's an address space in which various chunks are marked as being Forbidden Zones left behind when a segment is destroyed. (64-bit addresses are permanently assigned to segments - unlike, say, Multics, where a segment is assigned an address when it's mapped into the address space, and there's no guarantee that, if it's mapped out of the address space and later mapped back in, it will get the same segment number - so there needs to be some way to deal with addresses that refer to a segment that no longer exists in the system.)

I'm not sure how this is handled in the RISC AS/400 and IBM Power Systems machines, as the fetched-and-executed instruction set is 64-bit PowerPC AS/Power ISA AS, with full 64-bit addressing. Perhaps there are other bits available in an MI pointer - I have the impression they're 128-bit on RISC, and may even be 128-bit on the CISC machines, containing additional metadata. Guy Harris (talk) 07:07, 31 January 2025 (UTC)