User:Henriok/Power Architecture

Power Architecture
Designer	Power.org
Bits	32-bit/64-bit (32 → 64)
Introduced	2006
Version	2.06
Design	RISC
Type	Register-Register
Encoding	Fixed/Variable
Branching	Condition code
Endianness	Big/Bi
Extensions	AltiVec, APU, DSP, CBEA
Open	Yes
Registers
	32 GPR, 32 FPR. 32 Vector, 8 Condition, +more

Bits32-bit/64-bit (32 → 64)

Introduced2006

Version2.06

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