Cat qubit quantum computer

Cat qubits use coherent states of a quantum harmonic oscillator—microwave photons trapped in a superconducting resonator—as their logical 0 and 1 states.^[1] The name derives from the Schrödinger's cat thought experiment, in which a system exists in a superposition of two macroscopically distinct states.^[3]

Errors in quantum computation generally occur as bit-flip errors — changing a qubit's logical state from 0 to 1 or vice versa — and phase-flip errors, which alter the relative phase between superposed states.^[2][4]

The key property of cat qubits is that the probability of a bit-flip decreases exponentially with the number of photons in the coherent state.^[1] In conventional superconducting transmon-based architectures using surface codes, correcting both types of errors can require a significant number of physical qubits to realize a single error-free logical qubit.^[2]

Cat qubits can be stabilized against bit-flip errors by coupling the qubit to an environment that preferentially exchanges pairs of photons with the system. This autonomously counteracts the effects of some errors that generate bit-flips and ensures that the quantum state remains within the desired error-corrected subspace.^[5]

The intrinsic suppression of bit flips means that error correction only needs to address one dominant error channel, a property known as a noise-bias. This allows for the use of one-dimensional error correction codes, such as the classical repetition code, rather than two-dimensional surface codes.^[6]

As a result, cat qubits could encode a logical qubit in a more hardware-efficient architecture to enable a universal set of fully protected logical operations while avoiding the significant overhead required by other error-correcting codes.^[6]

This design suggests that cat qubits demonstrate the potential to efficiently scale to full error correction and fault tolerant quantum computing.^[5][7]

Cat qubits were first proposed as the building blocks for a universal fault-tolerant quantum computer in 2001.^[8]

In 2015, Devoret et al. published the first experimental demonstration of cat qubits.^[9][10]

In 2020, cat qubits in an oscillator exponentially suppressed bit-flips, demonstrating the potential for quantum computation with reduced overhead.^[11]

In 2024, Alice & Bob researchers extended the bit-flip lifetime – the duration a qubit can maintain its state before it experiences a bit-flip error – to seven minutes.^[12][13]

In 2025, AWS developed a chip that demonstrated a 1.65% per cycle for a five-cat qubit array.^[3][14] Achieving this degree of error suppression with larger error-correcting codes previously required tens of additional qubits. However, the chip still needs to address both bit-flip and phase-flip errors as it incorporates both transmons and cat qubits.^[2]