PICMG 2.4 From Wikipedia, the free encyclopedia PICMG 2.4 is a specification by PICMG that standardizes user IO pin mappings from ANSI/VITA standard IP sites to J3/P3, J4/P4, and J5/P5 on a CompactPCI backplane.[1] Status Adopted: 9 September 1998 Current revision: 1.0 References [1]"IP on CompactPCI". PICMG. Archived from the original on 2007-01-09. This computing article is a stub. You can help Wikipedia by adding missing information.vte Related Articles