Valentina Salapura
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Valentina Salapura | |
|---|---|
| Alma mater | Technische Universität Wien (PhD), University of Zagreb (M.S) |
| Awards | Gordon Bell Prize (2006)[1] |
| Scientific career | |
| Fields | High-performance computing, computer architecture |
| Institutions | IBM, AMD, Google |
Valentina Salapura is a researcher and expert in high-performance computing (HPC), supercomputing, and computer architecturet.[2] She has contributed to designing and developing advanced computing systems, focusing on scalable architectures, parallel processing, and energy-efficient computing. Her work spans both academic research and industry applications.
Salapura earned her PhD in computer science from the Technische Universität Wien in Vienna, Austria. She also holds M.S. degrees in computer science and electrical engineering from the University of Zagreb in Croatia.[3] Her early academic work focused on optimizing computer architectures and developing computing methodologies. [citation needed]
Career
Salapura has held positions at IBM, AMD, and Google.[4] At IBM, she contributed to the development of the Blue Gene supercomputer and was involved in the architecture of the Power8 processor.[5]
Later, Salapura joined AMD Research, where she worked on distributed computing and supercomputing technologies, leading the development of high-performance computing (HPC) software libraries and the software architecture for the Frontier system, the world's first public exascale computer.
Contributions to high-performance computing
Salapura's work in HPC includes integrating heterogeneous computing and accelerators into hyperscale data centers. Her research into energy efficiency in computing emphasizes the design of systems that balance high performance with minimal energy consumption.[6]
Salapura was a leader in the development of the BlueGene system, contributing to the design of BlueGene/L, BlueGene/P, BlueGene/Q, and Frontier supercomputers.
BlueGene/L
Blue Gene/L employed low-frequency, low-power embedded PowerPC cores with floating-point accelerators. This design traded individual processor speed for higher power efficiency, making it suitable for massively parallel applications. The system reduced power consumption by utilizing many low-power cores to perform computations simultaneously.[7][8][9][10]
BlueGene/P
Blue Gene/P improved upon its predecessor by increasing the density of processor cores. Each rack contained 1,024 nodes with a total of 4,096 processor cores. The design focused on maximizing power efficiency, with Blue Gene/P installations ranking near the top of the Green500 lists in 2007–2008 for their energy efficiency[11][12][13][14][15]
BlueGene/Q
The BlueGene/Q system, particularly the Sequoia installation at Lawrence Livermore National Laboratory, achieved 16.32 petaflops of performance using 1,572,864 cores. This system was the first supercomputer to utilize more than one million cores. It was primarily water-cooled and consisted of 96 racks, 98,304 compute nodes, and 1.6 petabytes of memory. Sequoia was significantly more power-efficient compared to its predecessors.[16][17]
Frontier
Frontier, developed by Hewlett Packard Enterprise and AMD and installed at Oak Ridge National Laboratory, became the world's first exascale supercomputer in May 2022. Frontier can achieve 1.194 exaflops in the high-performance Linpack (HPL) benchmark. The system uses 8,699,904 CPU and GPU cores and features HPE's Slingshot 11 network for data transfer. Frontier is cooled by a water system that pumps 60,000 gallons per minute. [citation needed]
Contributions to subfields in computer science
Salapura has contributed to multiple subfields, including HPC, supercomputing, and distributed systems. her work has been used to advance quantum chromodynamics simulations.
She has also worked in cloud computing,[18] focusing on virtualization and resiliency. Her early work on processor architecture and microarchitecture design has influenced subsequent advancements.
Publications
- Salapura, Valentina; Hamann, Volker (1994). "Using Statecharts and Embedded VHDL for Fuzzy Controller Design". VHDL-Forum for CAD in Europe : Spring '94 Meeting, general sessions. OCLC 912356038.
- Salapura, Valentina (1994). "Neural networks using bit stream arithmetic: a space efficient implementation". IEEE International Symposium on Electrical Insulation, 1994. Vol. 6. Piscataway: IEEE. pp. 475–478. doi:10.1109/ISCAS.1994.409629. ISBN 9780780319424.
- Gschwind, Michael; Salapura, Valentina; Maischberger, Oliver (1995). "Space Efficient Neural Net Implementation". FPGA '94 : 1994 ACM Second International Workshop on Field Programmable Gate Arrays : February 13-15, 1994, Berkeley Marina Marriott, Berkeley, California, USA. ACM. OCLC 36377420.
- Gschwind, Michael; Salapura, Valentina (1995). "A VHDL Design Methodology for FPGAs". In Moore, Will R.; Luk, Wayne (eds.). Field-Programmable Logic and Applications: 5th International Workshop, FPL '95, Oxford, United Kingdom, August 29 - September 1, 1995. Proceedings. Berlin, Heidelberg: Springer. pp. 208–217. ISBN 3-540-60294-1.
- Salapura, Valentina; Hamann, Volker (1996). "Implementing fuzzy control systems using VHDL and statecharts". Proceedings EURO-DAC '96. European Design Automation Conference with EURO-VHDL '96 and Exhibition. IEEE Comput. Soc. Press. pp. 53–58. doi:10.1109/EURDAC.1996.558075. ISBN 978-0-8186-7573-7.
- Georgiou, Christos J.; Salapura, Valentina; Denneau, Monty (2004). "A Programmable, Scalable Platform for Next-Generation Networking". In Crowley, Patrick; Franklin, Mark A.; Hadimioglu, Haldun; Onufryk, Peter Z. (eds.). Network Processor Design. Morgan Kaufmann Series in Computer Architecture and Design. Vol. 2: Issues and Practices. Amsterdam: Morgan Kaufmann Publishers. pp. 11–28. ISBN 978-0-12-198157-0. ISSN 1545-9888.
- Salapura, Valentina; Gschwind, Michael; Maischberger, Oliver (1994). "A Fast FPGA Implementation of a General Purpose Neuron". In Hartenstein, Reiner W.; Servít, Michal Z. (eds.). Field-Programmable Logic: Architectures, Synthesis and Applications: 4th International Workshop on Field-Programmable Logic and Applications, FPL'94, Prague, Czech Republic, September 7-9, 1994. Proceedings. Berlin, Heidelberg: Springer. pp. 175–182. ISBN 3-540-58419-6.
- Salapura, Valentina (2011). "Vector Extensions, Instruction-Set Architecture (ISA)". In Padua, David A. (ed.). Encyclopedia of Parallel Computing. Springer reference (1st ed.). New York, NY: Springer. pp. 2129–2135. ISBN 978-0-387-09765-7. OCLC 751526277.
- Blumrich, Matthias; Salapura, Valentina; Gara, Alan (2011). "Exploring the Architecture of a Stream Register-Based Snoop Filter". In Stenström, Per (ed.). Transactions on High-Performance Embedded Architectures And Compilers III. Lecture Notes in Computer Science. Vol. 6590. Berlin Heidelberg: Springer. pp. 03–114. doi:10.1007/978-3-642-19448-1. eISSN 1611-3349. ISBN 9783642194481. ISSN 0302-9743.
- Salapura, Valentina; Karkhanis, Tejas; Nagpurkar, Priya; Moreira, Jose (February 2012). "Accelerating business analytics applications". IEEE International Symposium on High-Performance Comp Architecture. pp. 1–10. doi:10.1109/HPCA.2012.6169044. ISBN 978-1-4673-0826-7.
- Hsu, Ching-Hsien; Shi, Xuanhua; Salapura, Valentina, eds. (2014). Network and parallel computing: 11th IFIP WG 10.3 International Conference, NPC 2014, Ilan, Taiwan, September 18-20, 2014. Proceedings. Lecture Notes in Computer Science. Vol. 8707 (1st ed.). New York: Springer. doi:10.1007/978-3-662-44917-2. eISSN 1611-3349. ISBN 978-3-662-44916-5. ISSN 0302-9743. OCLC 896441216.
- Li, Min; Tan, Jian; Wang, Yandong; Zhang, Li; Salapura, Valentina (6 May 2015). "SparkBench: A comprehensive benchmarking suite for in memory data analytic platform Spark". Proceedings of the 12th ACM International Conference on Computing Frontiers. pp. 1–8. doi:10.1145/2742854.2747283. ISBN 978-1-4503-3358-0. OCLC 941003239.