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R. Fabian Pease

Engineer and professor (born 1936) From Wikipedia, the free encyclopedia

Roger Fabian Wedgwood Pease (born 24 October 1936)[1] is an engineer and William E. Ayer Professor of Electrical Engineering, Emeritus at Stanford University.[2] He is also an emeritus member of the National Academy of Engineering[3] and Fellow of the IEEE.[4] His research includes work in the fields of micro- and nanofabrication, nanostructures,[5] and miniaturization.[6]

Born (1936-10-24) 24 October 1936 (age 89)
Cambridge, England
Othernames
  • Roger Fabian W. Pease
  • R. Fabian W. Pease
  • R. F. Pease
  • Fabian Pease
RelativesPease family
Quick facts Born, Other names ...
R. Fabian Pease
Born (1936-10-24) 24 October 1936 (age 89)
Cambridge, England
Other names
  • Roger Fabian W. Pease
  • R. Fabian W. Pease
  • R. F. Pease
  • Fabian Pease
RelativesPease family
Academic background
Education
Academic work
DisciplineEngineer
Sub-discipline
InstitutionsStanford University
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Early life and education

Pease was born in Cambridge,[1] the youngest of 6 children of Helen Bowen Wedgwood and Michael Stewart Pease, making him a member of both the Pease and Wedgwood families. He attended Bedales School; after completing schooling, he joined the Royal Air Force in 1955, serving two years and becoming a radar officer.[7][8] He received a Bachelor of Arts in 1960 from Trinity College, Cambridge, where he later received Master of Arts and Doctor of Philosophy degrees in 1964; that year, he moved to the United States.[1]

Pease's Ph.D. was on improving the scanning electron microscope to resolutions below 10 nm.[9]

Career

Pease worked as an assistant professor at University of California, Berkeley from 1964 to 1967,[4] after which he worked at Bell Labs.[9] In 1978, he became a professor of electrical engineering at Stanford University, where he held the William Ayer Professorship.[2] In 2009, he retired and was made emeritus. The Pease-Ye professorship at Stanford was named in his honor on its endowment.[10]

Pease is credited as the co-inventor of microchannel cooling for chip stacks.[11]

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