ARM Cortex-A520
CPU microarchitecture designed by ARM
From Wikipedia, the free encyclopedia
The ARM Cortex-A520 is a CPU microarchitecture designed by Arm Holdings and licensed as a semiconductor intellectual property core. It implements the 64-bit ARMv9 instruction set and supports heterogeneous computing via a big.LITTLE configuration. The design succeeds the Cortex-A510 in its role as a low performance, power efficient core, and is announced in 2023 together with the Cortex-A720 and the X4.[1][2][3]
| General information | |
|---|---|
| Launched | 2023 |
| Designed by | ARM Ltd. |
| Performance | |
| Max. CPU clock rate | 1.8 GHz to 2.27 GHz |
| Cache | |
| L1 cache | 64/128 KiB (32/64 KiB I-cache with parity, 32/64 KiB D-cache) per core |
| L2 cache | 0–512 KiB per complex |
| L3 cache | 256 KiB – 32 MiB (optional) |
| Architecture and classification | |
| Microarchitecture | ARM Cortex-A520 |
| Instruction set | ARMv9.2-A |
| Products, models, variants | |
| Product code name |
|
| History | |
| Predecessor | ARM Cortex-A510 |
| Successor | ARM C1-Nano |
Technical overview
The A520 is an in-order CPU core intended for low-performance, low-power workloads.
- ARMv9.2 instruction set[4]
- Claimed performance improvement of up to 8% over the Cortex-A510[5]
- Support only Aarch64 applications
- Optional L2 cache of up to 512KiB per core
- Supports QARMA3 pointer authentication codes (PAC)
Architecture comparison
- "LITTLE" core
| uArch | Cortex-A53 | Cortex-A55 | Cortex-A510 | Cortex-A520 |
|---|---|---|---|---|
| Codename | Apollo | Ananke | Klein | Hayes |
| Peak clock speed | ~2 GHz | |||
| Architecture | ARMv8.0-A | ARMv8.2-A | ARMv9.0-A | ARMv9.2-A |
| AArch | 32-bit and 64-bit | 64-bit | ||
| Branch predictor history (entries) |
3072[6] | - | ||
| Out-of-order | No | |||
| L0 Cache | No | |||
| L1-I + L1-D | 8/64+8/64 KiB | 16/64+16/64 KiB | 32/64+32/64 KiB | |
| L2 | 0–256 KiB | 0–512 KiB | ||
| L3 | None | 0–4 MiB | 0–16 MiB | 0–32 MiB |
| Decode Width | 2 | 3 | 3 (2 ALU) | |
| Dispatch | 8[7] | |||
See also
- ARM Cortex-X4, related high performance microarchitecture
- ARM Cortex-A720, related efficient sustained performance microarchitecture
- Comparison of ARMv8-A cores, ARMv8 family
